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Functional Safety Implementation Goes Mainstream

Oct 22, 2019 - In order to be compliant with ISO 26262 requirements, companies need to perform a software tool qualification assessment of the EDA tools they use to establish that the design tool ...

No More PIzza! Bringing Power to the Age-old Question: "What's for Dinner?"

Sep 26, 2019 How high-performance computing affects simple decisions like what to have for dinner.

Getting Better Results Faster with a Unified RTL-to-GDSII Product

Sep 3, 2019 - Advanced process nodes require new design tools. A single RTL-to-GDSII solution with a unified data model brings better results faster – by design.

Synopsys FPGA Platform: Enabling Faster Design, Verification and Debug of FPGAs

This white paper describes how the Synopsys FPGA Platform fulfills all requirements for development of the industry’s most advanced programmable devices. - August 2019

proteanTecs Success

Synopsys' Custom Design Platform accelerated proteanTecs' IP development across multiple advanced nodes while significantly improving design TAT and cost.

Fast FPGA Design Debug using Integrated Platform Solution

Jul 31, 2019 - This webinar introduces the Identify® RTL debugger and its ability to instrument RTL HDL while still at the RT-Level and debug the implemented FPGA on live, running hardware.

IC Compiler II 2019.03: Technology Update and Roadmap

July 16, 2019 - This webinar will provide an update on the latest design implementation technologies available in Synopsys’ IC Compiler II 2019.03.

The MOSIS Service Selects Synopsys' IC Validator for Large-scale FinFET SoCs

Jul 11, 2019 - IC Validator Delivers Superior Performance for DRC and LVS Signoff

IC Compiler II 2019 Extends Runtime and QoR Leadership with 2X Faster ...

Jul 11, 2019 - Realtek Deploys IC Compiler II for Its Next-generation Communications Network Design