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Accelerating Hyperconvergent IC Design

Meet Sassine Ghazi, Synopsys COO, introducing PrimeSim Continuum and unleashing the industry’s only proven GPU-accelerated SPICE simulation technology providing up to 10X runtime speedup with ...

Our Exciting Custom/AMS Design Program at SNUG World

This blog will focus on custom and analog/mixed-signal (AMS)-centric presentations and convince you to attend SNUG World, which kicks off on April 20th.

SNUG World Silicon Test and Analytics Track

This year’s SNUG World (formerly SNUG Silicon Valley) is also undergoing change and evolving. It is now a virtual experience, providing an excellent opportunity to share content that Synopsys users...

Synopsys and Samsung Foundry Collaboration Delivers High-Performance Physical...

Apr 6, 2021 - IC Validator Delivers 30 Percent Compute Savings with Dynamic Elastic CPU on Cloud

Accelerate Complex RF Designs using Keysight PathWave ADS Platform & Custom ...

Cedric Pujol, Product Manager, Keysight Technologies and Damian Roberts, Sr. Staff AE, Synopsys, demonstrate the unified solution for full flow RFIC design and show how designers are achieving ...

Validating Memory Design Scan Chains from Behavioral to Transistor Level

March 24, 2021 - In this Synopsys webinar, we will discuss the only solution for validating scan chains from higher behavioral models all the way down to transistor level implementation. By ...

Samsung Foundry and Synopsys: Efficient and Fast Physical Verification on the...

Mar 23, 2021 - In this webinar by Synopsys, we will demonstrate how to setup IC Validator physical verification on Samsung SAFE Cloud Design Platform, leveraging Rescale’s high performance compute ...

Accelerate Custom Layout using Custom Compiler’s User-Defined Device (UDD) – ...

In part 2 of this video series, Shabbir Batterywala, Synopsys Scientist, shows how layout designers create complex parameterized custom layout structures in an easy-to-use graphical environment, ...

Enabling a Future of Advanced Node Design Where Uncertainty is a Constant

Mar 01, 2021 - Criteria for devices tested continually changes. How can you turn worst-case scenarios into best case scenarios when designing an SoC?

Accelerate Custom Layout using Custom Compiler’s User-Defined Device (UDD)

In part 1 of this video series, Shabbir Batterywala, Synopsys Scientist, will show how layout designers can create parameterized custom layout structures in an easy-to-use graphical environment, ...