Oct 22, 2019 - In order to be compliant with ISO 26262 requirements, companies need to perform a software tool qualification assessment of the EDA tools they use to establish that the design tool ...
Sep 26, 2019 How high-performance computing affects simple decisions like what to have for dinner.
Sep 3, 2019 - Advanced process nodes require new design tools. A single RTL-to-GDSII solution with a unified data model brings better results faster – by design.
This white paper describes how the Synopsys FPGA Platform fulfills all requirements for development of the industry’s most advanced programmable devices. - August 2019
Synopsys' Custom Design Platform accelerated proteanTecs' IP development across multiple advanced nodes while significantly improving design TAT and cost.
Jul 31, 2019 - This webinar introduces the Identify® RTL debugger and its ability to instrument RTL HDL while still at the RT-Level and debug the implemented FPGA on live, running hardware.
July 16, 2019 - This webinar will provide an update on the latest design implementation technologies available in Synopsys’ IC Compiler II 2019.03.
Jul 11, 2019 - IC Validator Delivers Superior Performance for DRC and LVS Signoff
Jul 11, 2019 - Realtek Deploys IC Compiler II for Its Next-generation Communications Network Design