Chip Design Resources

Sort by

Synopsys Suggests

Verifying Functional Safety Designs with Fault Simulation

Apr 14, 2020 - This webinar presents a methodology to effectively verify the functional safety logic implemented by Synplify Premier at the early stages of the design flow using fault ...

Power Management Becomes Top Issue Everywhere

Mar 12, 2020 - Power management is becoming a bigger challenge across a wide variety of applications, from consumer products to large data centers.

PrimePower

Full-chip Power Analysis Solution

RTL Architect

RTL Architect's "shift-left" strategy significantly reduces time-to-feedback

The Breakthrough Technology Behind RTL Architect

Neeraj Kaul, VP of Engineering, discusses RTL Architect’s core capabilities and provides an overview of its unique capabilities.

Predictive RTL Design Closure with RTL Architect

Shankar Krishnamoorthy, SVP of Engineering, discusses the genesis of RTL Architect, Synopsys' predictive RTL design closure solution

Synopsys Unveils RTL Architect To Accelerate Design Closure

Mar 16, 2020 - Unique RTL Tuning Environment Reduces Physical Design Iterations

Synopsys Advances State-of-the-Art in Electronic Design with Revolutionary ...

Mar 11, 2020 - Introducing Synopsys DSO.ai™: The world's first autonomous AI application for chip design

Synopsys Custom Design Platform Secures Full-flow Displacement of Legacy ...

Mar 10, 2020 - Synopsys announces that silicon IP provider Alphawave has adopted the Synopsys Custom Design Platform to accelerate the design of multi-standard connectivity solutions.

Samsung Adopts Synopsys' Machine Learning-Driven IC Compiler II for its ...

Mar 04, 2020 - Recent Advances in Machine Learning (ML) Technologies Extend Synopsys' QoR Leadership