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Fusion Compiler Comprehensive RTL-to-GDSII Implementation System

Nov 2018 - The semiconductor industry is going through a renaissance period with waves of technological advancements and innovation...

IC Compiler II: Finding the Best Floorplan, Fast

Nov 2014 - Today’s designs are large and very complex, requiring hierarchical planning and implementation methodologies. A fast, accurate solution enables design teams to converge on the best ...

Concurrent Clock and Data Optimization with IC Compiler II

Dec 2014 - To advance concurrent clock and data optimization, we need to go beyond incremental enhancements and bolt-on solutions. An optimal solution to CCD needs to provide a fast, convergent, ...

Fast, Convergent Clock Synthesis & Optimization with IC Compiler II

Mar 2014 - As more and more challenges from capacity, variability and complexity need to be managed, it is imperative to readdress and rethink both the algorithmic and infrastructural aspects of ...

Advanced Design Planning in IC Compiler II

Mar 2014 - Design exploration and planning is becoming an increasingly critical step of the design creation process as growing constraints and requirements are placed upon it. IC Compiler II has ...

IC Compiler II Multi-Level Physical Hierarchy Floorplanning

Jan 2016 - Large, complex SoC designs require hierarchical layout methodologies that span multiple levels of physical hierarchy. Many EDA tools only handle two levels of physical hierarchy at a ...

IC Compiler II: Building a Scalable Platform to Enable the Next 10x in ...

Mar 2014 - Keeping up with the pace demanded by Moore’s law is putting increasingly expanding strains on today’s design planning and physical implementation tools. Merely tweaking existing ...

IC Compiler II: 5X Faster Closure on Advanced Designs With Complex MCMM

Dec 2014 - IC Compiler II with its native support for MCMM and MV is the most comprehensive, physical implementation system for advanced designs. It delivers 5X faster throughput, 3X larger ...

Accelerated Optimization with IC Compiler II

Sep 2014 - Efficient optimization is a necessary yet challenging aspect of the physical implementation flow. Newer nodes and growing designs are all conspiring to place growing demands on this ...

IC Validator Programmable EERC Mixed Mode Checking Technology

Jun 2016 - A new, comprehensive reliability solution is needed to reduce time to market, improve reliability and ensure longer device operation. This paper is a companion to the introductory IC ...