Chip Design Resources

Sort by

Synopsys Suggests

RTL Architect: Parallel RTL Exploration with Unparalleled Accuracy

July 2021 - Learn how RTL Architect enables designers to "shift-left" and predict the implementation impact of their RTL.

Debugging Point-to-Point Resistance Using Contribution by Layer in IC ...

June 2021 - Learn how IC Validator™ PERC includes all the needed capabilities for a point-to-point (P2P) resistance flow.

Optimize Physical Verification Cost of Ownership with Elastic CPU Management

May 2021 - Learn how IC Validator elastic CPU management technology delivers significant value in the design flow both in resource/cost optimization and in accelerating design closure to meet ...

Lower Process Nodes Drive Timing Signoff Software Evolution

Oct 2020 - In this whitepaper, we will describe major advances in timing signoff technologies that address the new challenges.

Machine Learning — Everywhere: Enabling Self-Optimizing Design Platforms for ...

Jul 2020 - Machine-learning offers opportunities to enable self-optimizing design tools. AI-enhanced tools are able to learn and improve in (local) design environments after deployment.

RTL Architect: Simply Better RTL

May 2020 - Electronic devices play a key role in society. They connect us to one another through voice, video and chat. They entertain, educate, protect and heal us in new and ever-expanding ways. ...

Synopsys FPGA Platform: Enabling Faster Design, Verification and Debug of FPGAs

Aug 2019 - This white paper describes how the Synopsys FPGA Platform fulfills all requirements for development of the industry’s most advanced programmable devices.

Accelerating Physical Verification Productivity for Advanced Node Designs ...

Mar 2019 - Learn how to increase productivity using IC Validator physical verification for advanced node designs.

TestMAX Family of Test Products

Mar 20, 2019 - The Synopsys TestMAX™ family of test products delivers innovative test and diagnostic capabilities for all digital, memory, and analog portions of a semiconductor device with unique ...

Accelerating Toshiba's SoC Design with Fusion Compiler

Feb 2019 - Learn how Toshiba's early access to the industry’s only RTL-to-GDSII solution speeds time-to-market for their latest, advanced, automotive SoC