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Broadcom Discuss Experience Using Formality for Interactive ECO Implementation

At Silicon Valley SNUG 2019, Broadcom presented a paper on their success implementing manual ECO’s with Formality’s interactive ECO functionality. Listen to Sathappan Palaniappan, Principal ...

SNUG 2019 Custom Design Platform Lunch

Mar 21, 2019 - Learn about accelerating robust custom design from Arm, Samsung, STMicroelectronics and Synopsys in this SNUG Lunch and Learn event recording.

SNUG Silicon Valley 2019 Test Lunch Panel

At SNUG Silicon Valley 2019, Synopsys TestMAX was unveiled during a special lunch event with a panel of test experts. Watch the videos to learn more.

Innovations in IC Validator for Advanced Node Physical Signoff

Learn about the latest technologies in IC Validator including; Explorer, Live, Scalability, Elastic Computing and more. Shorten time to tapeout by 2x.

Physical verification runtimes are exploding at advanced technology nodes due...

Learn how IC Validator technology improves physical verfiication productivity.

On-demand Signoff DRC for Custom Design Flows

Designers need immediate and on-the-fly DRC feedback as they do the layout edits. IC Validator Live DRC checking offers signoff quality DRC directly.

IC Validator DRC Checking

How to Accelerate DRC Checking During SoC Integration

Boosting Analog Reliability: Dealing with Variability and Physical Effects in...

Jan 17, 2019 - In this Tech Talk video with Semiconductor Engineering, Synopsys' Aveek Sarkar talks about challenges with complex design rules, rigid design methodologies, and the gap between ...

Physical Verification in the Cloud: IC Validator and AWS

Learn about IC Validator DRC on Amazon Web Services, scaling for faster performance, and elastic CPU management to add CPUs on the fly.

Toshiba Memory Corporation BiCS FLASH Memory

Synopsys speeds up verification and TTM of TMC BiCS FLASH memory