At Silicon Valley SNUG 2019, Broadcom presented a paper on their success implementing manual ECO’s with Formality’s interactive ECO functionality. Listen to Sathappan Palaniappan, Principal ...
Mar 21, 2019 - Learn about accelerating robust custom design from Arm, Samsung, STMicroelectronics and Synopsys in this SNUG Lunch and Learn event recording.
At SNUG Silicon Valley 2019, Synopsys TestMAX was unveiled during a special lunch event with a panel of test experts. Watch the videos to learn more.
Learn about the latest technologies in IC Validator including; Explorer, Live, Scalability, Elastic Computing and more. Shorten time to tapeout by 2x.
Learn how IC Validator technology improves physical verfiication productivity.
Designers need immediate and on-the-fly DRC feedback as they do the layout edits. IC Validator Live DRC checking offers signoff quality DRC directly.
How to Accelerate DRC Checking During SoC Integration
Jan 17, 2019 - In this Tech Talk video with Semiconductor Engineering, Synopsys' Aveek Sarkar talks about challenges with complex design rules, rigid design methodologies, and the gap between ...
Learn about IC Validator DRC on Amazon Web Services, scaling for faster performance, and elastic CPU management to add CPUs on the fly.
Synopsys speeds up verification and TTM of TMC BiCS FLASH memory