Sept. 18, 2018 - Enabling Device Intelligence—AI Chip Design from the Data Center to the Edge
The rationale for fusing together various pieces of digital design.
What can go wrong with power analysis at advanced nodes.
Jun 26, 2018 - Automotive Drives the Next Generation of Designs
Jun 25, 2018 - Advancing Custom/AMS Design for Storage, Automotive, and AI Applications
Synopsys innovative advanced signoff solutions deliver golden accuracy, fast turnaround and best power-performance-area to push IC design to new frontiers.
ST Microelectronics shares how ECO Fusion enables signoff analysis within IC Compiler II, saving time and increasing accuracy.
Learn about Toshiba's experience using in-Design rail analysis flow with RedHawk Analysis Fusion
Architected to extract maximum process entitlement for 5-nm-and-beyond processes’, Synopsys’ latest Fusion Technology is helping customers realize optimal full-flow, power, performance and area ...
In the later stages of design cycle, it is important to identify and fix DRC issues quickly to meet the tapeout schedule. This video discusses some techniques and best practices. Taking advantage ...