Learn about how Lynx Design System’s Design Tracker enables quick access to project status and reports to facilitate data-driven decisions.
Sept. 18, 2018 - Enabling Device Intelligence—AI Chip Design from the Data Center to the Edge
Inductance effects on clock nets can have serious consequences to performance and reliability of today’s advanced process technology designs. In this video, Greg Rollins, principle engineer from ...
Sassine Ghazi, GM of Synopsys’ Design Group, discusses how a revolution in digital design was started by creating a single data model for all design, and he describes how Fusion Compiler, the ...
Dr. Aiqun Cao, VP of Engineering for Synopsys’ Design Group, discusses how Fusion Compiler’s unified physical synthesis and common optimization framework enables full-flow concurrent clock and data...
The rationale for fusing together various pieces of digital design.
ST Microelectronics shares how ECO Fusion enables signoff analysis within IC Compiler II, saving time and increasing accuracy.
Todd Buzan, Senior Director of R&D, discusses how Formality enables aggressive optimizations in Synthesis to achieve maximal QoR.
Learn about how Fusion Compiler's integrated signoff-quality engines enables designers to achieve the highest performance, lowest power and area on their SoC designs.
Introducing the latest full-flow RTL-to-GDSII platform solution from Synopsys. Built using market leading point tools and unique Fusion Technologies.