Shankar Krishnmoorthy discusses the historical legacy and how we have continuously evolved with the ever-present challenges to deliver best-in-class synthesis solutions.
Learn about how Fusion Compiler's integrated signoff-quality engines enables designers to achieve the highest performance, lowest power and area on their SoC designs.
Announcing a new era in digital implementation with Fusion Compiler and Design Compiler NXT at the center of the next generation of Synopsys digital design.
Introducing the latest full-flow RTL-to-GDSII platform solution from Synopsys. Built using market leading point tools and unique Fusion Technologies.
Sept. 18, 2018 - Enabling Device Intelligence—AI Chip Design from the Data Center to the Edge
The rationale for fusing together various pieces of digital design.
Synopsys innovative advanced signoff solutions deliver golden accuracy, fast turnaround and best power-performance-area to push IC design to new frontiers.
ST Microelectronics shares how ECO Fusion enables signoff analysis within IC Compiler II, saving time and increasing accuracy.
Learn about Toshiba's experience using in-Design rail analysis flow with RedHawk Analysis Fusion
Inductance effects on clock nets can have serious consequences to performance and reliability of today’s advanced process technology designs. In this video, Greg Rollins, principle engineer from ...