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Formality ECO: Functional ECOs Faster, Better, First Time Right!

Oct 22, 2020 - In this session, we will present the superiority of Formality ECO’s technology that delivers patches with minimal disturbance to the implemented design and enabling you to achieve ...

Case Study: Optimize and Configure Synopsys DesignWare IP with RTL Architect

Sep 29, 2020 - This webinar will provide a case study of how the Synopsys R&D team for DesignWare ARC EV Processor IP used RTL Architect to accelerate their IP’s time-to-market. It will explain how...

Want the Best PPA on the Latest Arm Cortex-A78 and Cortex-X1 Cores? Learn How...

July 28, 2020 - Presented jointly by Arm® and Synopsys, this webinar focuses on the high-performance Arm-core IP that includes the Arm Cortex®-A78 and Cortex-X1 CPU processors. In this webinar, we ...

Attain Best PPA on Advanced Arm® Cores with Fusion Compiler’s New ...

May 21, 2020 - This webinar will be kicked-off by Arm, who will share an overview of their latest, market-optimized HPC-core offerings, followed by a technology deep-dive by R&D from Synopsys’ Arm ...

Validating and Configuring a NoC IP with RTL Architect: The Experience of ...

May 19, 2020 - In this webinar, Synopsys and Arteris IP will explain how Synopsys RTL Architect helps ensure that the RTL IP Arteris releases meets the demanding market requirements and also how it...

Efficient RTL-to-GDSII FuSa Implementation for Automotive Designs

May 07, 2020 - This webinar will provide an overview of native safety mechanism implementation solutions, such as DCLS and fail-safe finite state machine.

Achieving the Best PPA for an Arm Cortex-A77 Core Using Synopsys Fusion Compiler

Sep 19, 2019 - In this webinar, Arm and Synopsys will highlight the key attributes of the Cortex-A77 core architecture and the best practices, new methodologies, and enabling technologies in Fusion...