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Functional Safety Implementation Goes Mainstream

Oct 22, 2019 - In order to be compliant with ISO 26262 requirements, companies need to perform a software tool qualification assessment of the EDA tools they use to establish that the design tool ...

No More PIzza! Bringing Power to the Age-old Question: "What's for Dinner?"

Sep 26, 2019 How high-performance computing affects simple decisions like what to have for dinner.

"It's Time for a Change"

Sep 07, 2019 - One Golden-Signoff-Capable Timing Engine to Rule them All.

Getting Better Results Faster with a Unified RTL-to-GDSII Product

Sep 03, 2019 - Advanced process nodes require new design tools. A single RTL-to-GDSII solution with a unified data model brings better results faster – by design.

AI's Growing Impact on Chip Design

Jan 16, 2019 - Semiconductor Engineering interviews Aart de Geus to discuss the impact of AI on chip design.

Variation In Low-Power FinFET Designs

Aug 30, 2018 - Old solutions don’t necessarily work anymore, particularly at advanced nodes and ultra-low voltage.

Fusion Improves Timing Say Synopsys Users

Jul 03, 2018 - Early-access customers talk about their experiences using Fusion Technology enabled portfolio of tools at DAC 2018.