Chip Design Resources

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Synopsys Suggests

AI's Growing Impact on Chip Design

Jan 16, 2019 - Semiconductor Engineering interviews Aart de Geus to discuss the impact of AI on chip design.

Variation In Low-Power FinFET Designs

Aug 30, 2018 - Old solutions don’t necessarily work anymore, particularly at advanced nodes and ultra-low voltage.

Fusion Improves Timing Say Synopsys Users

Jul 03, 2018 - Early-access customers talk about their experiences using Fusion Technology enabled portfolio of tools at DAC 2018.

The Path to 2nm

Mar 23, 2018 - Diminishing returns may evaporate at 5nm

What to Expect at 5-nm and Beyond and What that Means for EDA

Mar 14, 2018 - With EUV finally on the verge of being inserted into volume manufacturing, let's look at some innovations that have brought us to this point and what ultimately lies ahead for ...