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Ethernet PHY and Custom Compiler Workshop

Dec 7, 2018 - Hear from the Synopsys IP team about its high-speed 56G Ethernet PHY IP design project’s key findings, illustrating how designers can optimize their design methodology. Get hands-on ...

Test SIG Dinner at ITC 2018

Oct 29, 2018 - Synopsys Customers are Invited to attend the 26th Annual Test SIG Event at ITC 2018 in Phoenix

TSMC 2018 Open Innovation Platform Forum

Oct 3, 2018 - Visit Synopsys at the TSMC Open Innovation Platform Forum in Santa Clara

DAC 2018 Automotive Lunch

Jun 26, 2018 - Automotive Drives the Next Generation of Designs

DAC 2018 Custom Lunch

Jun 25, 2018 - Advancing Custom/AMS Design for Storage, Automotive, and AI Applications

Silicon Valley Arm-Synopsys Workshop 2018

Accelerating Arm-based SoC Design and Verification

SNUG 2018 IC Validator Lunch Panel

Extreme Physical Verification Productivity Gains with IC Validator

SNUG 2018 Custom Design Platform Lunch

Mar 22, 2018 - Accelerating Robust Custom Design

ITC 2017 Test SIG Dinner

Oct 2, 2017 - Test experts from leading companies describe how they are using the newest capabilities in Synopsys’ comprehensive test and yield solution.

DAC 2017 Custom Compiler Lunch

Jun 20, 2017 - Cutting Custom Layout Tasks from Days to Hours