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Fusion Compiler

Predictable RTL-to-GDSII Implementation System Delivers Up To 20 Percent Better Quality-Of-Results

Design Compiler NXT

Next Generation RTL Synthesis Boosts Runtime by 2X and QoR by 5 Percent


User-friendly Prototyping Tool that Works Directly From Your RTL Source Code and ASIC IP.

FPGA Platform

Integrated FPGA Design Flow From Planning Through Synthesis

DC Ultra

Best-in Class Timing, Area, Power, and Test Optimization Correlated with Physical Results


Ultra-high Compression for Maximum Test Cost Reduction


Adaptive Scan Compression for Cost-effective DSM Testing

IC Compiler II

Place and Route Solution For Advanced FinFET Process Technologies


Golden Timing Signoff STA Solution and Environment

Design Compiler Graphical

Create a Better Starting Point for Faster Physical Implementation