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Ethernet PHY and Custom Compiler Workshop

Dec 7, 2018 - Hear from the Synopsys IP team about its high-speed 56G Ethernet PHY IP design project’s key findings, illustrating how designers can optimize their design methodology. Get hands-on ...

High Speed Ethernet PHY IP Design Methodology Optimization using Custom Compiler

Nov 20, 2018 - This webinar describes how the Synopsys Mixed-Signal IP team optimized their design methodology in a single custom design platform to meet the circuit design, simulations, layout and...

Accelerating Development of DesignWare Mixed-Signal PHY IP with Custom Compiler

Dino Toffolon, VP of Engineering for DesignWare IP at Synopsys, discusses his team's successful development of advanced, silicon-proven, mixed-signal interface IP using Custom Compiler.

Accelerating Low-Power, High-Speed Data Storage Design using Custom Compiler

Seagate Technology, discusses the advantages of using Custom Compiler on their storage design.

Synopsys Custom Compiler Doubles New Customer Adoptions, Introduces New Release

Oct 23, 2018 - New Fusion Technologies Reduce Time to Analog Design Closure

Synopsys Custom Design Platform Delivers Breakthrough Analog Simulation and ...

Oct 23, 2018 - 3X Faster Analog Simulation and New Fusion Technologies Accelerate AMS Design

TSMC 2018 Open Innovation Platform Forum

Oct 3, 2018 - Visit Synopsys at the TSMC Open Innovation Platform Forum in Santa Clara

Synopsys Announces Availability of TSMC-certified IC Design Environment in ...

Oct 3, 2018 - TSMC and Synopsys Collaboration Streamlines Cloud-based IC Design

Synopsys Digital and Custom Design Platforms Certified on TSMC 5-nm EUV-based...

Oct 1, 2018 - Certification Delivers Proven Production-ready Flow for Advanced Customer Designs

Graphcore Uses Synopsys Design Platform to Implement Colossus Chip to ...

Sep 18, 2018 - Synopsys Fusion Technology Enables Superior Power, Performance, Area for AI Chip Design