Chip Design Resources

Sort by

Synopsys Suggests

High Speed Ethernet PHY IP Design Methodology Optimization using Custom Compiler

Nov 20, 2018 - This webinar describes how the Synopsys Mixed-Signal IP team optimized their design methodology in a single custom design platform to meet the circuit design, simulations, layout and...

Renesas Case Study: Reducing Custom Net Routing Time by 4X for Automotive ...

Aug 23, 2017 - Renesas explains how they use Custom Compiler Co-Design with IC Compiler II in their production design environment to create high-quality shielded nets in in-vehicle CPU and IP modules