Chip Design Resources

Sort by

Synopsys Suggests

SNUG 2019 Custom Design Platform Lunch

Mar 21, 2019 - Learn about accelerating robust custom design from Arm, Samsung, STMicroelectronics and Synopsys in this SNUG Lunch and Learn event recording.

Boosting Analog Reliability: Dealing with Variability and Physical Effects in...

Jan 17, 2019 - In this Tech Talk video with Semiconductor Engineering, Synopsys' Aveek Sarkar talks about challenges with complex design rules, rigid design methodologies, and the gap between ...

Accelerating Development of DesignWare Mixed-Signal PHY IP with Custom Compiler

Dino Toffolon, VP of Engineering for DesignWare IP at Synopsys, discusses his team's successful development of advanced, silicon-proven, mixed-signal interface IP using Custom Compiler.

Accelerating Low-Power, High-Speed Data Storage Design using Custom Compiler

Seagate Technology, discusses the advantages of using Custom Compiler on their storage design.

DAC 2018 Custom Lunch

Jun 25, 2018 - Advancing Custom/AMS Design for Storage, Automotive, and AI Applications

SNUG 2018 Custom Design Platform Lunch

Mar 22, 2018 - Accelerating Robust Custom Design

DAC 2017 Custom Compiler Lunch

Jun 20, 2017 - Cutting Custom Layout Tasks from Days to Hours

SNUG 2017 Custom Compiler Lunch

Mar 23, 2017 - Cutting FinFET Layout Tasks from Days to Hours

Introducing Custom Compiler Visually-assisted Automation

Antun Domic, Executive VP and GM of the Design Group unveils Synopsys' next-generation custom design solution.