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Synopsys Suggests

Ethernet PHY and Custom Compiler Workshop

Dec 7, 2018 - Hear from the Synopsys IP team about its high-speed 56G Ethernet PHY IP design project’s key findings, illustrating how designers can optimize their design methodology. Get hands-on ...

TSMC 2018 Open Innovation Platform Forum

Oct 3, 2018 - Visit Synopsys at the TSMC Open Innovation Platform Forum in Santa Clara

DAC 2018 Custom Lunch

Jun 25, 2018 - Advancing Custom/AMS Design for Storage, Automotive, and AI Applications

SNUG 2018 Custom Design Platform Lunch

Mar 22, 2018 - Accelerating Robust Custom Design

DAC 2017 Custom Compiler Lunch

Jun 20, 2017 - Cutting Custom Layout Tasks from Days to Hours

SNUG 2017 Custom Compiler Lunch

Mar 23, 2017 - Cutting FinFET Layout Tasks from Days to Hours