Chip Design Resources

Sort by

Synopsys Suggests

Is There A Practical Test For Rowhammer Vulnerability?

Rowhammer is proving to be a difficult DRAM issue to fix. While efforts continue to mitigate or eliminate the effect, no solid solution has yet made it to volume production.

AI Testing: Pushing Beyond DFT Architectures

The size of massive, highly parallel AI processor chips has a significant impact on design and test methodologies.

The Challenge Of Balancing Performance And Accuracy For Advanced Node Timing ...

Nov 12, 2020 - Read about how process variability, physical effects, and the impact of interconnect are critical in timing analysis.

EDA Forms the Basis for Designing Secure Systems

Jul 21, 2020 - As Internet of Things (IoT) devices rapidly increase in popularity and deployment, security risks are arising at all levels. It could be at the usability level such as social ...

Packaging And Design Evolution

May 14, 2020 - Multi-die systems are becoming increasingly complex to handle the needs of compute intensive markets.

Analog Design Needs to Change

Apr. 23, 2020 - On their own, better tools aren’t enough to keep pace with analog design challenges.

Power Management Becomes Top Issue Everywhere

Mar 12, 2020 - Power management is becoming a bigger challenge across a wide variety of applications, from consumer products to large data centers.

Machine-Learning...Everywhere!

Feb 06, 2020 - AI is transforming the world around us, creating an avenue to innovation across all sectors of the global economy.

Parasitic Extraction Requirements Driven by Custom Design

Jan 28, 2020 - Fast growing markets like 5G, biotechnology, AI, and automotive are driving the new wave in semiconductor design and the need for highly integrated SoCs.

AI Chips Driving Need For New Test Implementation Methodologies

Dec 19, 2019 - Artificial intelligence has never been more in the news than it is today. From picking stock market investments to autonomous driving, we have heard about what AI can do...