Chip Design Resources

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Synopsys Suggests

Low Power Meets Variability At 7/5nm

Apr 11, 2019 - Reductions in voltage, margin and increases in physical effects are making timing closure and signoff much more difficult.

Building Bridges: A New DFT Paradigm

Mar 28, 2019 - Greater complexity and smaller process nodes are driving a major shift in design-for-test implementation

AI's Growing Impact on Chip Design

Jan 16, 2019 - Semiconductor Engineering interviews Aart de Geus to discuss the impact of AI on chip design.

Cracking The Auto IC Market

Sep 6, 2018 - Race is on to grab a share of this growing market, but it’s not so simple.

Variation In Low-Power FinFET Designs

Aug 30, 2018 - Old solutions don’t necessarily work anymore, particularly at advanced nodes and ultra-low voltage.

Chip Aging Becomes Design Problem

Aug 09, 2018 - Assessing the reliability of a device requires adding more physical factors into the analysis, many of which are interconnected in complex ways

More Sigmas in Auto Chips

Aug 02, 2018 - Increasing robustness levels will require significant changes throughout the entire automotive ecosystem.

Auto Chip Ecosystem Needs Common Language

Aug 02, 2018 - To reach the levels of robustness that autonomous vehicles will require, companies throughout the auto and semiconductor ecosystems are working with an eye toward high-sigma design.

Automotive Is Setting The Goalposts For Next Generation Designs

Jul 24, 2018 - Synopsys customers at DAC 2018 share their experiences how automotive applications are having a tremendous influence on semiconductor design.

Fusion Improves Timing Say Synopsys Users

Jul 03, 2018 - Early-access customers talk about their experiences using Fusion Technology enabled portfolio of tools at DAC 2018.