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GNFerror During an LVS Run

Learn how to fix GNFerror during LVS run.

Important IC Validator LVS Output Files

After successful completion of LVS run, the IC Validator tool creates many output files and we will discuss few important ones. In this video, we will see IC Validator output files to check after ...

IC Validator Short Finder

Short finder allows you to walk through individual polygons in the shorted paths until the violation is found. In this video, we will see how to use IC Validator Short Finder to debug text and ...

IC Validator Net Trace Utility

The net trace feature allows you to probe and trace any net in the design, and to track down potential LVS violations and connections of interest. In this video, we will see how to use IC Validator...

IC Validator with Partial Results

In this video, we will see how to exit from IC Validator job with partial results.

Run-only IC Validator Command

You can run only the desired runset checks/functions using run-only command line options. In this video, we will see how to execute a run-only IC Validator job.

Cal2pxl Utility

Cal2pxl is a translation utility which can be used to convert Calibre DRC and LVS runsets to PXL for use with IC Validator. In this video, we will see how to use cal2pxl utility.

Unveiling Innovations for Digital Design

Dr. Aart de Geus describes the dynamics that are driving the need for the fusion of synthesis and place-and-route technologies to achieve best PPA and predictable design closure, enabling the ...

Accelerating Development of DesignWare Mixed-Signal PHY IP with Custom Compiler

Dino Toffolon, VP of Engineering for DesignWare IP at Synopsys, discusses his team's successful development of advanced, silicon-proven, mixed-signal interface IP using Custom Compiler.

Fusion Design Platform Technical Overview

Shankar Krishnmoorthy discusses the historical legacy and how we have continuously evolved with the ever-present challenges to deliver best-in-class synthesis solutions.