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Host Addition in Existing IC Validator Job

In this video, we will see how to add a host to an IC Validator job that is already running. Here, “add host” denotes that you already have started a run with N number of CPUs and then you are ...

IC Validator on Multiple CPUs

In this video, we will see how to run IC Validator on multiple CPUs from same or different machines.

Pattern Library Using IC Validator Pattern Library Manager

The IC Validator Pattern Library Manager (PLM) is a graphical user interface (GUI) that provides an alternative way to build a pattern library for an IC Validator pattern matching run instead of ...

Pattern Matching in IC Validator

In this video, we will learn how to perform Pattern matching in IC Validator.

Pattern Library Creation

In this video, we will learn how to create a pattern library in IC Validator.

IC Validator Signoff DRC in IC Compiler II

In this video, We will see how to run IC Validator Signoff DRC in IC Compiler II tool. We also call it In-Design Signoff DRC.

IC Validator VUE in IC Compiler II

IC Validator In-Design signoff design rule checking runs the IC Validator tool within the IC Complier II tool to check the routing design rules defined in the foundry signoff runset. in this video,...

Replay File in IC Validator VUE

You can load a replay file from any previous VUE session using Load Replay File option. Loading a replay file will be very useful to auto-populate input configuration needed for a particular IC ...

IC Validator Connect Debugger Utility

The IC Validator VUE Connect Debugger, which is part of the Layer Debugger, allows you to highlight and debug nets in a connect database. In this video, we will see how to use IC Validator Connect ...

IC Validator Error Heat Map

The IC Validator Error Heat Map is a graphical interface used for error visualization and hot spot detection. In this video, we will see how to use IC Validator Error Heat Map to debug DRC errors.