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IC Compiler II at DAC 2016

In this video, hear from industry leaders presented to an interested crowd about how they are achieving success in their advanced designs using IC Compiler II technology to address physical design ...

DAC 2016 Samsung/Synopsys Breakfast: Ready to Design at 10nm!

Samsung and Synopsys are enabling design teams to create advanced designs for high performance computing and mobile applications on 10nm FinFET technology. On June 7, 2016, Synopsys hosted a ...

Fujitsu's Customized Flow with Design Compiler – 33% Higher Design Density ...

Atsushi Tsuchiya, Hardware Design Engineer, Fujitsu

How to Debug, Diagnose and Improve your Synthesis Results

Use Synplify Premier to debug, diagnose, and improve your synthesis results

IC Compiler II: Delivering the Power of 10X

At the 2015 Silicon Valley SNUG , IC Compiler II demonstrated both the realization and the continuing vision of the Power of 10X. IC Compiler II activities this year included highlights in Aart’s ...

Synopsys: Design Exploration to Accelerate PPA Closure using Lynx Design System

SNUG Silicon Valley 2015 presentation on design exploration to accelerate performance, power and area closure of a mobile computing ARM® Cortex®-A53 targeting Samsung Foundry 28LPP and 14LPP FinFET...

Formality Ultra Demo

This video demonstration shows how to accelerate implementation of a functional ECO with Formality Ultra. - John Lehman, Senior CAE Manager, Synopsys

Accelerating SoCs to Market with the Power of 10X

IC Compiler II has proven to be a game-changer in physical design, accelerating silicon success for designers of the world's most advanced ICs. Hear industry leaders discuss how 10X faster ...

IC Compiler II Optimization: Powered by a New, Global-analytics Based Framework

This video provides an overview of physical optimization in IC Compiler II and how the new global-analytics- based framework enables high QoR along with fast, hierarchical full chip closure.