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Unified Physical Synthesis in Fusion Compiler

Transforming how designers go from RTL to placement in a single design cockpit.

Design Compiler NXT

Learn about how Design Compiler NXT delivers faster, better quality of results and is advanced node ready synthesis.

Platform-Wide Innovations to Meet the Challenges of 5-nm and Beyond

With the advent of 5nm and the need for best in class power, performance, and area requirements there is an unprecedented need for integration across synthesis, place and route, and signoff. ...

IC Validator on Multiple CPUs

In this video, we will see how to run IC Validator on multiple CPUs from same or different machines.

Host Addition in Existing IC Validator Job

In this video, we will see how to add a host to an IC Validator job that is already running. Here, “add host” denotes that you already have started a run with N number of CPUs and then you are ...

Layout-Versus-Layout (LVL) Using IC Validator

IC Validator Layout Versus Layout (LVL) utility compares two layout files and flags the differences between them. In this video, learn how to run LVL using IC Validator to compare two layout files.

IC Validator with Partial Results

In this video, we will see how to exit from IC Validator job with partial results.

Select/Unselect DRC Rule Checks for IC Validator Run

Learn how to run Design Rule Checks (DRC) interactively from IC Validator VUE interface. IC Validator VUE is a flow based graphical tool that guides you through the entire physical verification ...

Quick Layout-Versus-Layout

Quick Layout Vs Layout (LVL) points out where is the difference rather than exact difference which is provided by regular LVL. Quick LVL speeds up the comparison time and generate simplified error ...

Setup IC Validator Tool in Your Environment

Learn how to setup IC Validator tool in your environment and how to change tool versions.