Learn how to run IC Validator incremental DRC flow by layer/window options. You can run incremental DRC flow using layer lists, layer numbers or layout window coordinates. The tool outputs only DRC...
You can run only the desired runset checks/functions using run-only command line options. In this video, we will see how to execute a run-only IC Validator job.
Pydb2ascii utility generates an ASCII format error file (.err) from the IC Validator error database PYDB. In this video, we will see how to generate an ASCII format error file from the PYDB database.
Dr. Henry Sheng, group director of R&D at Synopsys, discusses how Fusion Compiler delivers signoff-accurate PPA on high-performance, low-power designs at advanced nodes, and accelerates design ...
Aug 23, 2017 - Renesas explains how they use Custom Compiler Co-Design with IC Compiler II in their production design environment to create high-quality shielded nets in in-vehicle CPU and IP modules
Oct 24, 2016 - Platform Certified for Samsung's Second Generation of 10nm Process (10LPP)
Jun 06, 2018 - Synopsys is bringing artifical intelligence to it's PrimeTime signoff tool.
This blog is dedicated to custom layout topics - Graham Etchells
Thinking two steps ahead to address future challenges at 5nm and below
Sep 14, 2017 - In this webinar, Meena Gupta will discuss how Cavium uses the latest technology in Design Compiler Graphical to achieve superior results while moving to an advanced process node.