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My RTL is an Alien! - Automating ASIC to FPGA-Based Prototype Conversion

Sep 2013 - FPGA-based prototyping is gaining popularity because it provides an economical way to functionally verify an ASIC design by creating a prototype that runs close to "at speed." FPGA-based...

High Throughput GSPS Signal Processing Using Synthesizable IP Cores

Jan 2014 - This whitepaper illustrates how parallel processing synthesizable IP cores available in Synphony Model Compiler enable Giga Samples Per Second (GSPS) throughput on FPGAs, and efficient ...

Formality Error-ID Technology Defines Debug Productivity

Have you ever experienced the "now what" anxiety that accompanies a failing equivalence checking verification? Have you found yourself staring at a logic cone with thousands of gates and no clear ...

IC Validator

Comprehensive Signoff DRC / LVS Tool


Comprehensive Cell, I/O and Memory Characterization

DFTMAX Compression Shared I/O

Nov 2014 - This joint white paper with Arm highlights why shared I/O capability in DFTMAX compression and TetraMAX ATPG is the preferred approach for testing multicore Arm® processor designs

StarRC™ Custom: Next-Generation Modeling and Extraction Solution for Custom ...

May 2010 - Custom digital, analog/mixed-signal, and memory designs are particularly sensitive to the nanometer device parameters and parasitics

Fusion Technology

Fusion Technology, best-in-class optimization + industry-golden signoff

DAC 2018 Custom Lunch

Jun 25, 2018 - Advancing Custom/AMS Design for Storage, Automotive, and AI Applications

Innovation Through Technology Leadership and Partnership-Oriented DNA

The most advanced volume production nodes are 12/10 nanometers, while 8/7 nanometers, both immersion lithography and EUV, are in final stages of development, and will move into volume production soon.